Certain heterostructure materials, such as Aluminum Gallium Nitride (AlGaN) and GaN, create an electron well (i.e., a sheet of electrons) at the interface between the two dissimilar materials resulting from the piezoelectric effect and spontaneous polarization effect therebetween. The resulting sheet of electrons that forms at this interface are typically referred to as a Two-Dimensional Electron Gas (“2DEG”) channel or two-dimensional hole gas (“2DHG”) channels. Both types of structures can be referred to as “2D×G channel(s)” devices. FETs that operate by generating and controlling the electrons in the 2D×G channel are conventionally referred to as high electron mobility transistors (“HEMTs”).
By stacking a plurality of these two-material heterostructures, and with the addition of appropriate doping in the layers to maintain the presence of the 2D×G channels when stacking a plurality of heterostructure layers, the electron sheets are able to act in parallel, allowing for greater current flow through the superlattice device. When this type of FET is “on”, the superlattice device has a lower on-resistance, relative to a single heterostructure-layer device, because the multiple 2DEG channels allow a proportionally higher current to flow between the source and drain, resulting in an overall reduction in on-resistance. This type of structure has been well suited for providing an ultra low channel resistance high frequency switch.
Due to difficulties in pinching off field effect transistors (FETs), having channels formed from superlattice structures, from the top of the multichannel device, the epitaxial region is instead etched into to form ridges that are pinched off via a gate contact from the sides. Due to limits imposed on both ridge width and sidewall slope by fabrication techniques, these FETs tend to show significantly higher pinch-off voltages and higher induced electric fields than do most standard, single channel, top pinching FETs. Specifically, for top pinching standard FETs, the gate is very close to the channel, thus allowing small pinch-off voltages, and higher breakdown voltages. However, for sidewall gates pinching-off etched ridges, distances from gate to the center of the ridge is much larger significantly increasing the necessary pinch-off voltage and increasing the resulting induced electric fields. This increase in the resulting induced electric fields contributes to a lower breakdown voltage than a similar top pinching FET.